Mark Indovina

Senior Lecturer

Kate Gleason College of Engineering

Electrical and Microelectronic Engineering

2023 Submissions

Full Patent

Ganguly, Amlan, et al. "LOOK-UP TABLE CONTAINING PROCESSOR-IN-MEMORY CLUSTER FOR DATA-INTENSIVE APPLICATIONS." U.S. Patent US11775312. 3 Oct. 2023.

Peer Reviewed/Juried Poster Presentation or Conference Paper

Agbalessi, Christie and Mark A. Indovina. "CNNET: A Configurable Hardware Accelerator for Efficient Inference of 8-bit Fixed-Point CNNs." Proceedings of the 2023 IEEE 36th International System-on-Chip Conference (SOCC). Ed. IEEE. Santa Clara, CA: IEEE. *

2022 Submissions

Published Conference Proceedings

Das, Prangon, et al. "Implementation and Evaluation of Deep Neural Networks in Commercially Available Processing in Memory Hardware." Proceedings of the 2022 IEEE 35th International System-on-Chip Conference (SOCC). Ed. IEEE. Belfast, United Kingdom: IEEE, 2022. Web. *

2021 Submissions

Journal Paper

Sutradhar, Purab Ranjan, et al. "Look-up-Table Based Processing-in-Memory Architecture With Programmable Precision-Scaling for Deep Learning Applications." IEEE Transactions on Parallel and Distributed Systems 33. 2 (2022): 263-275. Print. *

Published Conference Proceedings

Connolly, Mark, et al. "Flexible Instruction Set Architecture for Programmable Look-up Table based Processing-in-Memory." Proceedings of the 2021 IEEE 39th International Conference on Computer Design (ICCD). Ed. IEEE. Storrs, CT: IEEE, 2021. Web. *

Gillela, Rohini J., et al. "The IANET Hardware Accelerator for Audio and Visual Data Classification." Proceedings of the 2020 IEEE 33rd International System-on-Chip Conference (SOCC). Ed. IEEE. Las Vegas, NV: IEEE, 2021. Web. *

Full Patent

Indovina, Mark Allen, et al. "Appliance Network Connectivity Apparatus." U.S. Patent US11196650. 7 Dec. 2021.

2020 Submissions

Journal Paper

Sutradhar, Purab Ranjan, et al. "pPIM: A Programmable Processor-in-Memory Architecture With Precision-Scaling for Deep Learning." IEEE Computer Architecture Letters 19. 2 (2020): 118 - 121. Print. *

2019 Submissions

Published Conference Proceedings

Langroudi, Hamed F., et al. "Digital Neuromorphic Chips for Deep Learning Inference: A Comprehensive Study." Proceedings of the SPIE Optical Engineering + Applications, 2019. Ed. Michael E. Zelinski, et al. San Diego, California: SPIE, 2019. Web. £

Full Patent

Indovina, Mark Allen, et al. "Self-organized Multiple Appliance Network Connectivity Apparatus." U.S. Patent 10,462,022. 29 Oct. 2019.

2018 Submissions

Journal Paper

Ganguly, Amlan, et al. "The Advances, Challenges and Future Possibilities of Millimeter-Wave Chip-to-Chip Interconnections for Multi-Chip Systems." Journal of Low Power Electronics and Applications 8. 1 (2018): 1-36. Web. *

Published Conference Proceedings

Shinde, Tanmay, et al. "A 0.24pJ/Bit, 16Gbps OOK Transmitter Circuit in 45-nm CMOS for Inter and Intra-Chip Wireless Interconnects." Proceedings of the GLSVLSI '18, Chicago, IL, USA. Ed. Proceedings of the 2018 on Great Lakes Symposium on VLSI. NY, NY: ACM, 2018. Print. *