Teju Das Headshot

Teju Das

Associate Professor

Department of Electrical and Microelectronic Engineering
Kate Gleason College of Engineering

585-475-2174
Office Location
Office Mailing Address
79 Lomb Memorial Drive, 09-3181 Rochester, NY 14623

Teju Das

Associate Professor

Department of Electrical and Microelectronic Engineering
Kate Gleason College of Engineering

Education

MS, Ph.D., Rochester Institute of Technology

Bio

An engineer and inventor, Dr. Tejasvi Das spent 15 years in the semiconductor industry before joining RIT as an Associate Professor in January 2023. He has been granted over 160 US and International patents across a broad range of areas in the Analog & Mixed-signal IC domain, such as IoT sensing, interference robustness, haptics, audio processing, self-calibration, adaptive circuits and back-end algorithms. His inventions have been instrumental in the commercial success of numerous high-volume IC products. Dr. Das has held various R&D leadership positions in industry, ending as IC Architect at Cirrus Logic. He has successfully led multiple new technology initiatives from early proof of concept to volume production. 

Dr. Das is the director of RAMLab at RIT.  His research interests lie in high-performance, high-efficiency RF, Analog and Mixed-signal (RAM) circuits & systems, with particular focus on: IoT & bio sensing, Neuromorphic AI, Analog Computing, HW Security and dynamically adaptive mixed-signal systems. He is also very keen on exploring design methodologies for new and upcoming CMOS-compatible and post-CMOS devices. 

He currently teaches undergraduate and graduate-level courses in Analog and Mixed-signal IC design.

Dr. Das is currently looking for highly motivated B.S./M.S./Ph.D. students for funded positions for his group at RAMLab.  

585-475-2174

Areas of Expertise

Select Scholarship

  • A High-Efficiency Capacitor-less LDO with Adaptive Dynamic Range Extension for Biosensing Applications, IEEE Midwest Symposium on Circuits and Systems, Aug 2024
  • An analog payload trojan via power-supply harmonic coupling in front-end circuits, IEEE NEWCAS Conference, June 2024
  • Design Space Exploration of Memristor-based Delay Cells for Time-domain Neuromorphic Computing, IEEE International Symposium on Circuits and Systems, May 2024
  • Throughput Optimization for Time-Domain Neuromorphic Computing, IEEE Midwest Symposium on Circuits and Systems, Aug 2024
  • Single-capacitor inductive sense systems, US Patent 11,536,758, 2022
  • Force sensing system and method, US Patent 11,507,267, 2022
  • Frequency-selective common-mode control and output stage biasing in an operational amplifier for a class-D amplifier loop filter, US Patent 11,522,509, 2022
  • Self-calibration of input-match in RF front-end circuitry, IEEE Transactions on Circuits and Systems II, 2005
  • Interference detection and mitigation in inductive sensor applications and dynamic adaptation based on real-time noise detection, US Patent 11,093,060, 2021
  • Virtual button characterization engine, US Patent 11,079,874, 2021
  • Methods and apparatuses for providing a haptic output signal to a haptic actuator, US Patent 11,150,733, 2020
  • On-chip resonance detection and transfer function mapping of resistive-inductive-capacitive sensors, US Patent 10,935,620, 2021
  • False triggering prevention in a resonant phase sensing system, US Patent 10,642,435, 2020
  • Towards fault-tolerant RF front ends, Journal of Electronic Testing, 2006
  • Noise reduction in voltage reference signal, US Patent 10,460,819, 2019
  • Polymorphic playback system with switching oscillation prevention, US Patent 10,313,790, 2019
  • Adaptation of dynamic range enhancement based on noise floor of signal, US Patent 9,967,665, 2018
  • Systems and methods for gain calibration of an audio signal path, US Patent 9,337,795, 2016
  • Impact of asymmetric metal coverage on high performance MOSFET mismatch, Journal of Solid-State Electronics
  • Sensor signal correction, US Patent 11,520,436, 2020

Currently Teaching

EEEE-480
4 Credits
This is an introductory course in analog electronic circuit analysis and design. The course covers the following topics: (1) Diode circuit DC and small-signal behavior, including rectifying as well as Zener-diode-based voltage regulation; (2) MOSFET current-voltage characteristics; (3) DC biasing of MOSFET circuits, including integrated-circuit current sources; (4) Small-signal analysis of single-transistor MOSFET amplifiers and differential amplifiers; (5) Multi-stage MOSFET amplifiers, such as cascade amplifiers, and operational amplifiers; (6) Frequency response of MOSFET-based single- and multi-stage amplifiers; (7) DC and small-signal analysis and design of bipolar junction transistor (BJT) devices and circuits; (8) Feedback and stability in MOSFET and BJT amplifiers.
EEEE-510
3 Credits
This is a foundation course in analog integrated circuit design and is a prerequisite for the graduate courses in RF & mixed-signal IC design (EEEE-726 and EEEE-730). The course covers the following topics: (1) Review of CMOS technology, MOSFET models and Frequency Response (2) Single-stage amplifiers (3) Current mirrors and biasing (4) Current and voltage references (5) Differential amplifiers (6) Cascoding (7) Feedback and Stability (8) OTAs (9) Matching and layout techniques (10) Multi-stage op-amps (11) Noise Analysis (12) Linearity in analog circuits (13) Switched-cap circuits.
EEEE-610
3 Credits
This is a foundation course in analog integrated circuit design and is a prerequisite for the graduate courses in RF & mixed-signal IC design (EEEE-726 and EEEE-730). The course covers the following topics: (1) Review of CMOS technology, MOSFET models and Frequency Response (2) Single-stage amplifiers (3) Current mirrors and biasing (4) Current and voltage references (5) Differential amplifiers (6) Cascoding (7) Feedback and Stability (8) OTAs (9) Matching and layout techniques (10) Multi-stage op-amps (11) Noise Analysis (12) Linearity in analog circuits (13) Switched-cap circuits.
EEEE-789
3 Credits
Topics and subject areas that are not regularly offered are provided under this course. Such courses are offered in a normal format; that is, regularly scheduled class sessions with an instructor.