An introduction to the basics of integrated circuit fabrication. The electronic properties of semiconductor materials and basic device structures are discussed, along with fabrication topics including photolithography diffusion and oxidation, ion implantation, and metallization. The laboratory uses a four-level metal gate PMOS process to fabricate an IC chip and provide experience in device design - and layout (CAD), process design, in-process characterization and device testing. Students will understand the basic interaction between process design, device design and device layout.

Microlithography Materials and Processes covers the chemical aspects of microlithography and resist processes. Fundamentals of polymer technology will be addressed and the chemistry of various resist platforms including novolac, styrene, and acrylate systems will be covered. Double patterning materials will also be studied. Topics include the principles of photoresist materials, including polymer synthesis, photochemistry, processing technologies and methods of process optimization. Also advanced lithographic techniques and materials, including multi-layer techniques for BARC, double patterning, TARC, and next generation materials and processes are applied to optical lithography.

A laboratory course in which students manufacture and test CMOS integrated circuits. Topics include design of individual process operations and their integration into a complete manufacturing sequence. Students are introduced to work in process tracking, ion implantation, oxidation, diffusion, plasma etch, LPCVD, and photolithography. Student learn VLSI design fundamentals of circuit simulation and layout. Analog and Digital CMOS devices are made and tested. This course is organized around multidisciplinary teams that address the management, engineering and operation of the student run CMOS factory.

This course introduces the beginning graduate student to the fabrication of solid-state devices and integrated circuits. The course presents an introduction to basic electronic components and devices, lay outs, unit processes common to all IC technologies such as substrate preparation, oxidation, diffusion and ion implantation. The course will focus on basic silicon processing. The students will be introduced to process modeling using a simulation tool such as SUPREM. The lab consists of conducting a basic metal gate PMOS process in the RIT clean room facility to fabricate and test a PMOS integrated circuit test ship. Laboratory work also provides an introduction to basic IC fabrication processes and safety.

Microlithography Materials and Processes covers the chemical aspects of microlithography and resist processes. Fundamentals of polymer technology will be addressed and the chemistry of various resist platforms including novolac, styrene, and acrylate systems will be covered. Double patterning materials will also be studied. Topics include the principles of photoresist materials, including polymer synthesis, photochemistry, processing technologies and methods of process optimization. Also advanced lithographic techniques and materials, including multi-layer techniques for BARC, double patterning, TARC, and next generation materials and processes are applied to optical lithography. Graduate paper required.

This course focuses on CMOS manufacturing. Topics include CMOS process technology, work in progress tracking, CMOS calculations, process technology, long channel and short channel MOSFET, isolation technologies, back-end processing and packaging. Associated is a lab for on-campus section (01) and a graduate paper/case study for distance learning section (90). The laboratory for this course is the student-run factory. Topics include Lot tracking, query processing, data collection, lot history, cycle time, turns, CPK and statistical process control, measuring factory performance, factory modeling and scheduling, cycle time management, cost of ownership, defect reduction and yield enhancement, reliability, process modeling and RIT's advanced CMOS process. Silicon wafers are processed through an entire CMOS process and tested. Students design unit processes and integrate them into a complete process. Students evaluate the process steps with calculations, simulations and lot history, and test completed devices.